The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and apparatus for supporting BGA packages during one or more testing processes. Merely by way of example, the invention can be used to perform testing of the BGA packages without having to directly test the electrical components located within the BGA package. But it would be recognized that the invention has a much broader range of applicability.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. After the individual devices have been manufactured within the IC fabrication facility, the devices must be tested and packaged to ensure the reliability of the manufactured circuits. A technique that can be used to package the manufactured circuits is in a ball grid array (BGA) package, where the circuit is encapsulated within a molding material to protect the circuit from exposure or undesired contact. Solder balls are attached to the base of the package to provide a reliable electrical connection from the integrated circuit.
After a packaging process has been performed on an integrated circuit, it may be necessary to decapsulate or open the package to facilitate analysis or electrical examination of the integrated circuit or its internal features. For example, thermal testing may be performed on the exposed circuit after decapsulation to determine if hotspots are present on the chip after the circuit has been cycled in operation. Another reason for decapsulation of a package can be to check for crossed wires or pinholes within the integrated circuit. A decapsulation process can consist of a purely mechanical process such as prying or cutting away the encapsulant layer, or may be performed using a chemical etch, plasma etch, or thermomechanical removal process to remove the encapsulant layer.
After decapsulation has been performed, additional testing of the integrated circuit or BGA package can be performed. Two exemplary types of testing that may be performed following decapsulation are Emission Microscopy (EMMI) and Optical Beam Induced Resistance Change (OBIRCH) analysis. These optical analysis techniques utilize a camera to capture either optical or photocurrent images of the circuit. Device defects often cause light emissions in the infrared or visible light spectrum, which can be detected in the captured images taken during EMMI analysis. A focused laser is applied in OBIRCH analysis which induces a photocurrent in the device. Differences in the photocurrent image can be compared against reference images to reveal circuit-level problems within the device. By detecting and localizing integrated circuit failures within the chips, these failure analysis techniques can be used to discover failures in the manufacture of the integrated circuit and package and enhance the quality control of the manufacturing operation.
However, testing often requires the integrated circuit to be probed or electrically connected to for further analysis. One difficulty with using failure analysis techniques is that directly probing of the integrated circuit contained within the BGA package can often can lead to short circuits and problems with the circuit due to the sensitive nature of the chip connections and parts. In addition, the exposed bond wires are fragile and can easily be broken or accidentally disconnected during testing. Furthermore, probing or connecting to the solder balls on the BGA package is difficult in that the exposed solder balls are located on the backside of the decapsulated BGA sample. Additionally, the round shape of the solder balls may cause problems in maintaining an electrical connection from the solder balls to testing equipment.
From the above, it can be seen that an improved technique for testing of BGA packages is desired.